1. Field of the Invention
This present invention relates to a thin film transistor(TFT), and more particularly, to a thin film transistor for LCD device and the fabrication method.
2. Description of The Related Art
Fabrication method and the structure of one of top gate type TFTs according to the related art will be explained with reference to FIGS. 1a to 1g. 
Referring to FIG. 1a, a buffer layer 20 is formed on a transparent substrate 10, and then an amorphous silicon(a-Si) layer 30a is deposited on the buffer layer 20 in order to form a semiconductor layer 30.
Poly-silicon(p-Si) layer 30b, shown in FIG. 1b, is made by crystallization of the amorphous silicon layer 30a. Then poly-silicon layer 30b, shown in FIG. 1c, is patterned using a conventional patterning technique. In this patterning process, a dry etching damage can occur in the semiconductor layer 30.
As shown in FIG. 1d, a gate insulating layer 40, which is made of inorganic substance such as silicon nitride(SiNx) and silicon oxide(SiOx) or organic substance such as BCB(benzoncyclobutene), is formed on the poly-silicon and buffer layers 30b and 20. Then a metal layer 50, which has a material selected from a group consisting of Molybdenum, Chrome, Aluminum, Titanium and so on, is deposited on a gate insulating layer 40.
Referring to FIG. 1e, a photoresist 60 is deposited on the whole gate layer 50, and then it is exposed to the light in order to leave a portion corresponding to a central portion of the semiconductor layer 30. Using the left photoresist, the gate insulating layer 40 and the gate layer 50 are etched and the peripheral portion of a semiconductor layer 30 is exposed. At the patterning process, the gate electrode 50 has narrower width than gate insulating layer 40 due to the difference in an etching rate and an etching time. After the etching process, a peripheral portion 30c of the semiconductor layer 30 is introduced by n+(or p+) ion doping (plasma doping) using the photoresist 60 as a mask. Due to the ion doping process the peripheral portion 30c of the semiconductor layer 30 is changed to the amorphous silicon. The other portions 30b of the poly-silicon layer 30 undoubtedly remains in the crystallization state.
As shown in FIG. 1f, the photoresist 60 is stripped off the gate electrode 50. For the purpose of re-crystallizing the peripheral portion 30c of the semiconductor layer 30, it is activated by activating process using laser beams. The lateral spaces xe2x80x9cD1xe2x80x9d and xe2x80x9cD2xe2x80x9d, between the edge of the gate insulating layer 40 and the gate electrode 50, act as an offset area reducing a leakage current (off current) of TFT.
After re-crystallizing the doped semiconductor layer (30c in FIG. 1f), as shown in FIG. 1g, an insulating layer 70 which is made of inorganic substance such as silicon nitride (SiNx) and silicon oxide (SiOx) or organic substance such as BCB (benzoncyclobutene) is formed. The insulating layer 70 covers the semiconductor layer 30, the gate insulating layer 40 and the gate electrode 50. The contact holes are formed in the insulating layer 70 to expose the peripheral portion 30c of the semiconductor layer 30, and then the metallic material selected from a group consisting of Molybdenum, Chrome etc is deposited to form source and drain electrodes 80a and 80b. 
As described above, the mentioned process completes the structure of TFT, which includes the semiconductor layer 30, the gate electrode 50 and the source and drain electrodes 80a and 80b. 
The conventional structure of the top gate type or offset TFT, however, results in deteriorating the quality of the TFT in the re-crystallization process. Since the laser beams are irradiated on the gate electrode 50 made of a metallic material, the laser beams can hurt or degrade the gate electrode 50 when re-crystallizing the semiconductor layer 30. And in order not to degrade the quality of the gate electrode 50, if weaker activating laser beams are irradiated on the peripheral portion 30c of the semiconductor layer 30, the semiconductor layer 30 is not sufficiently re-crystallized.
It is an object of the present invention to provide a top gate type TFT which does not result in the degradation of the gate electrode even in an enough laser beams condition and the fabrication method thereof.
In accordance with the purpose of the invention, as embodied and broadly described, in one aspect the invention provides a fabricating method of a TTT for LCD including: forming a buffer layer on a substrate; forming an amorphous semiconductor layer on the whole buffer layer, the semiconductor layer having a channel region and source and drain ohmic contact regions, each positioned at opposing ends of the channel region; doping n+(or p+) ions on the source and drain ohmic contact regions of the semiconductor layer while covering the channel region with a photoresist; patterning the semiconductor layer to have an island shape, the island shape including the channel region and the source and drain ohmic contact regions; irradiating laser beams on the semiconductor layer having the island shape, thereby crystallizing and activating the semiconductor layer; forming a first insulating layer on the semiconductor layer; forming a gate electrode on the first insulating layer; forming a second insulating layer on the first insulating layer while covering the gate electrode; forming source and drain contact holes penetrating both the first and second insulating layers to the source and drain ohmic contact regions of the semiconductor layer, respectively; and forming the source and drain electrodes on the second insulating layer, while the source and drain electrodes having electrical connection to the source and drain ohmic contact regions of the semiconductor layer.
The process order of the patterning process and the ion doping process can be changed.
After forming the semiconductor layer and before the ion doping process a process of forming a protecting layer on the semiconductor layer can be processed. And ion doping is processed on the protecting layer. After ion doping process the protecting layer is removed.
In an another aspect of the invention, the TFT includes a substrate; a buffer layer on the substrate; a semiconductor layer having a channel region and source and drain ohmic contact regions positioning at opposing ends of the channel region; a first insulating layer on the semiconductor layer; a gate electrode on the first insulating layer; a second insulating layer on the first insulating layer while covering the gate electrode; and source and drain electrodes electrically contacting the source and drain ohmic contact regions of the semiconductor layer, respectively.
The source and drain electrodes contact the ohmic contact regions via contacting holes penetrating the first and second insulating layers.
The width of the gate electrode is, preferably, narrower than the distance of the channel region.
The foregoing and other objectives of the present invention will become more apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.